2 to 4 Decoder VHDL code

how to write 2 to 4 Decoder VHDL code using with..select statement

There are many ways to write 2 to 4 decoder VHDL code. In the last FPGA programming blog post we showed VHDL code for 2 to 4 decoder implemented using when..else statement. Here we show an alternative way using with..select statement is shown here.

2 to 4 Decoder VHDL code

Below is the code.

The difference between using when..else statement and using with..select statement is that in case of when..else statement, each line or condition is checked one by one and if everything fails the else statement is executed. Whereas if we use the with..select statement, each line or condition is checked simultaneously and there all condition must be covered. Since in the above coder the signals are std_logic_vector and since the values can be other than 0 or 1, the when others condition must be included.

The following is the simulated waveform in VHDL software.

See also What is Entity and Architecture in VHDL.

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VHDL code for 2 to 4 decoder

VHDL code for 2 to 4 decoder

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